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Citation | Research Areas | Publication Date |
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S. Dutta, B. Grisafe, C. Frentzel, Z. Enciso, M. San Jose, J. Smith, K. Ni, S. Joshi, S. Datta, "Experimental demonstration of gate-level logic camouflaging and run-time reconfigurability using ferroelectric FET for hardware security" IEEE Transactions on Electron Devices, Jan. 2021 | Jan. 2021 |